Electrum-200 Manual/User Interfaces, Connectors, and Jumpers
From Manuals
The following image shows where the connectors, headers, and jumpers are located on the Electrum 200.
Power Supply
The Electrum 200 requires a regulated +5 VDC power supply on connector J1. Typical current requirements are 300 mA with all common peripherals enabled. J1 comes standard with a 2.5 mm positive center tapped female power supply jack. It can be populated with a 2 position screw terminal upon request. A diode (D1) will protect the Electrum 200 should polarity of the power supply be reversed. When power is applied LED1 will illuminate.
10/100 Ethernet
The Electrum 200 is equipped with a fully-integrated 10/100 Mbps Ethernet port. The Media Access Control (MAC) is implemented in the AT91SAM9260 and the Physical (PHY) layer is implemented with Micrel’s KSZ8041NL. J6 is the RJ-45 connector and it has integrated magnetics and LEDs completes the Ethernet sub-system. Please see the KSZ8041NL data sheet for further information on the PHY and the AT91SAM9260 data sheet for the MAC.
USB Host
The AT91SAM9260 has a fully-integrated USB v2.0 Host port. The host port handles full-speed and low-speed protocols. The port reaches the outside world through J14. J14 is a USB Type A connector. The USB host port controller is fully compliant with the OpenHCI specification. Please see the AT91SAM9260 data sheet for further details on the USB Host port.
Serial (COM) Ports
A Universal Synchronous Asynchronous Receivers/Transmitters (USART) is level shifted to RS-232 levels. USART0 (COM1) reaches the external world through a male DB9 connector. The Univesal Asynchronous Receiver/Transmitter (UART) Debug Unit (DBGU) is also level shifted to RS-232 levels. The DBGU (COM2/DBGU) reaches the external world through a 2x5 pin berg header. Please see figure 4.4 for the pin outs of COM1 (J3) and COM2/DBGU (J4) connectors. The two serial ports support software handshaking (XON/XOFF). To simplify interfacing to devices using hardware handshaking, a loopback is implemented on the modem control signals, from RTS to CTS and from DTR to CD and DSR. Note that the loopbacks do not provide flow control so software handshaking should be used when proper flow control is desired.
Micro-SD
The microSD socket (J9) enables micro-secure-digital memory cards to be plugged into the Electrum 200 microcontroller board. The microSD card allows the user the ability of a standard removable media for transferring data to and from the Electrum 200.
General Purpose Digital Inputs and Outputs
The general purpose digital inputs/outputs (I/O) are broken into two different categories GPIO (General Purpose Input/Outputs) and Extended I/O. The GPIO is accessed directly through the AT91SAM9260 microprocessor and the Extended I/O is accessed through the CPLD (Complex Programmable Logic Device) via the microcontrollers SPI port one.
There are thirty-three bits of GPIO available on the J2 connector. Please see the pin out for J2 in Figure 4.6. Seven bits are from port A, seventeen are from port B and nine are from port C. Ports A, B, and C have alternate functions other than digital inputs and outputs. Connecting anything to PA0, PA1, and PA2 may cause problems with communications to the Data flash, Micro SD card, 12-bit DAC, and 12-bit ADC because it is a shared SPI bus. Connecting anything to PB0, PB1, and PB2’s may cause problems with communications to the CPLD because it is a shared SPI bus. Table 4.6 lists the alternate functions and a brief description of the function. For further information on the alternate functions please refer to the AT91SAM9260 data sheet.
The J2 connector also has a variety of voltages and a couple of ground pins. The VBAT input is to battery back-up real-time timer. Pin 40 of J2 is where the VBAT input can be accessed and 1.65V to 1.95V may be applied to the pin. Before connecting a voltage to VBAT the 0-ohm resistor R30 will have to be removed and a jumper placed on pins 2 and 3 of JP4.
The extended I/O is accessed through the CPLD. There are four eight bit ports PXA, PXB, PXC, and PXD. The pin out for the extended I/O connector (J12) can be viewed in Figure 4.6. The numbers in parenthesis are the pin numbers for the CPLD. The provided VHDL firmware can be changed to use the extended I/O ports for application specific purposes. NOTE: If the LCD connector (J10) is used then PXD of the extended I/O is no longer available and nothing should be connected to pins 33 through 40 of J12.
Figure 4.6: Extended I/O and GPIO connector pin out (CPLD pin#)
Table 4.6: GPIO Alternate Functions
Keypad
A 4x4 matrix keypad using a 16-pin (2x8) ribbon cable can be connected to a portion of port B of the microprocessor through J11. Please see Figure 4.7 for the pin out of the keypad connector. If the ports are not used for a keypad they may be used for their alternate functions. Table 4.7 lists the alternate functions for the 8-bits of I/O connected to J11.
Figure 4.7: Keypad connector pin out
| J11 Pin# | GPIO | Alternate Function | Bried Description |
|---|---|---|---|
| 1 | PB24 | DTR0 | USART0 Data Transmit Ready |
| 2 | PB25 | R10 | USART0 Ring Indicator |
| 3 | PB26 | RTS0 | USART0 Ready to Send |
| 4 | PB27 | CTS0 | USART0 Clear to Send |
| 5 | PB28 | RTS1 | USART1 Ready to Send |
| 6 | PB29 | CTS1 | USART1 Clear to Send |
| 7 | PB30 | PCK0 | Programmable Clock Output 0 |
| 8 | PB31 | PCK1 | Programmable Clock Output 1 |
Liquid Crystal Display (LCD)
A standard alphanumeric LCD may be connected to J10 through a 32-pin (2x16) ribbon cable. Extended port D is the byte-wide port used for the LCD’s data bus. The LCD’s control signals and backlight are driven by the CPLD as well. The contrast for the LCD may be adjusted by turning potentiometer R33 located next to J10. Please see figure 4.8 for the LCD’s connector pin out. NOTE: If the LCD connector (J10) is used then PXD of the extended I/O is no longer available and nothing should be connected to pins 33 through 40 of J12.
Figure 4.8: LCD connector pin out (CPLD pin#)
JTAG
The JTAG port can be used for software download and debugging, reducing the need for an in-circuit emulator. For detailed information on the operation of the JTAG port with boundary scan, please refer to IEEE Standard 1149.1-Test Access Port and Boundary-Scan Architecture
Pushbuttons and LED
The Electrum 200 comes standard with a user pushbutton, a reset push button, a user LED and a power LED. The user push button is connected to port A bit 0 with a 10kΩ pull-up resistor connected to it. The user LED is connected to port A bit 6 and can be illuminated by CLEARING port A bit 6 of the AT91SAM9260.
CPLD Programming Header
The CPLD comes preprogrammed from the factory with VHDL code that will function with the example programs and certified PC/104 expansion boards. The VHDL firmware can be updated in two ways. The first way is directly through the CPLD’s JTAG port which can be accessed through the combination of JP1 and JP2 as illustrated in Figure 4.12. The second method is by programming the CPLD through the microprocessor. A utility provided by Micromint USA will program the CPLD through the AT91SAM9260s SPI1 port. This can be done by placing jumper across pins 1&2, 3&4, 5&6, and 7&8 of JP1 as like in Figure 4.11.
Figure 4.11: CPLD programming jumper pin out (CPLD pin#)
PC/104 Expansion
The available signals on the PC/104 expansion connector are shown in Figure 4.12. The default VHDL firmware shipped with the Eagle SBC allows access to those signals as extended I/O ports. VHDL firmware is available on the Micromint web site that allows use of certified PC/104 expansion boards with the Electrum SBC. Using the signals for extended I/O will lead to higher I/O performance but the PC/104 mode allows use of off-the-shelf expansion boards.
Figure 4.12: CPLD programming jumper pin out (CPLD pin#Figure 4.12: PC/104 connector pin out (CPLD pin#)
Analog to Digital Converter (ADC)
The Electrum 200’s optional eight channels of 12-bit ADC can be connected to through J7. Please see figure 4.13 for the pin out of the ADC connector. The ADC is accessed through the AT91SAM9260 SPI0 port. Port C bit 16 is the ADC’s chip select input for reading the conversion counts of the ADC.
Figure 4.13: Analog to Digital connector pin out
Digtial to Analog Converter(DAC)
The optional four channels of 12-bit DAC can be connected to through J8. Please refer to figure 4.14 for the pin out of the DAC connector. The DAC is accessed through the AT91SAM9260 SPI0 port. Port C bit 17 is the DAC’s sync input for loading the conversion count into the DAC.
Figure 4.14: Digital to Analog connector pin out
USB Device
The Electrum 200 is optionally equipped with a USB Device Port. The Device port is compliant with the USB V2.0 full-speed device specification. It reaches the outside world through J16. J16 is a micro USB Type AB connector. The USB device port has six endpoints that can be configured in one of several USB transfer types. Please see the AT91SAM9260 data sheet for further details on the USB Host port.
Option Jumpers
The Electrum 200’s option jumpers are used to set the microprocessor into different modes and have the extra pins that are available on the CPLD. JP3 is used to route power to VDDBU. If R30 is installed on the board then there should not be a jumper on JP3. If R30 is removed and an external power supply is going to be used to power VDDBU then a jumper should be placed on pins 2&3 and the user can apply power for VDDBU on pin 40 of J2. Figure 4.16 contains the pin out for JP3.
Figure 4.16: VDDBU Option Jumper
The chip select signal to the serial dataflash can be disconnected from the microprocessor by removing R32. If the signal needs to be reconnected then a jumper must be placed on JP4. Figure 4.17 contains the pin out of JP4.
Figure 4.17: VDDBU Option Jumper
JP1 is used to be able to put the microprocessor into different modes, to write protect the first 256 pages of the dataflash and to write protect the NAND flash. In order to enable the JTAG boundry scan a jumper must be placed on pins 1&2 before power is applied to the board. If a jumper is placed on pins 3&4 of JP1 before power is applied to the board then the microprocessor will boot from the serial dataflash. If the jumper is left off then the microprocessor will boot from the embedded ROM. If a jumper is placed on pins 5&6 the serial dataflash’s first 256 pages will be write protected. If a jumper is placed on pins 7&8 the NAND flash will be write protected.
Figure 4.18: VDDBU Option Jumper
On pins three through six of J17 are the left over pins from the CPLD. The GCK1, GCK3, GTS2, and GSR signals are not connected to any of the other hardware on the Electrum 200. Pins one and two of J17 are the input and output for the microprocessors shutdown controller. Figure 4.19 contains the pin out of J17.
Figure 4.19: VDDBU Option Jumper