Figure 1.3: Eagle 100 Hardware Block Diagram
The Eagle series of single board computers run on an ARM Cortex-M3 microcontroller with a vast array of peripherals from 10/100 Ethernet to a reprogrammable CPLD. Through example programs and project files this family of single board computers can be developed from concept to production quickly. The Eagle family is available in custom and standard configurations.
The Eagle 100 is a single board computer designed for cost-sensitive control applications that require real-time performance, networking and extensive support of popular peripherals. It delivers 32-bit performance and features at a cost equivalent to legacy 8- and 16-bit controllers. Powered by a Texas Instruments' Stellaris LM3S6918 ARM Cortex-M3 microcontroller, capable of over 60 MIPS, the Eagle 100 can fulfill demanding requirements in monitoring, instrumentation, data acquisition, process control, factory automation and many other applications. An extensive array of peripherals is built-in plus expandability is available using PC/104 I/O cards. Several peripherals can be reconfigured with the programmable logic capabilities of the integrated CPLD.
The EAGLE 100-20 development kit comes with all of the necessary hardware and software to quickly develop applications. The development kit includes the following:
The Eagle SBC is also available unbundled, without the power supply and debugger.
Code examples are included with the Eagle 100 to get you started quickly. Applications can run standalone with no operating system or can use a compact real time operating system such as FreeRTOS. You can use popular IDEs together with the GNU and IAR compilers. The microSD card capability simplifies program and data storage. Remote access can be implemented via web or command line interfaces, providing off-site monitoring and maintenance capabilities. The JTAG interface speeds up application development and debugging.
Ports of popular Basic and LUA development tools are available for the Eagle 100 to reduce application development time and simplify integration with code libraries developed for industrial and scientific environments. Using these tools, you can achieve significant functionality in a very short time. These open source tools can be easily extended, allowing a virtually unlimited number of possibilities.
Micromint USA provides free technical support by phone, email, or fax. Technical support emails are usually answered within one business day. Software and documentation updates are available on our website at www.micromint.com. Each product comes with a one year warranty.
Getting started with the Eagle 100 can be done in just 6 steps.
The Eagle 100 come from the factory preloaded with an application called enet_io that demonstrates web-based I/O control. The preloaded applications should be run to test the board after receiving it. The full source code for the application is provided on the Eagle's Wiki. http://wiki.micromint.com/index.php/Eagle_Documentation
The Eagle Single Board Computer's (SBC) with Ethernet are shipped with the enet_io example application from the TI Stellarisware Library. This example application demonstrates web-based I/O control using the Ethernet controller and the lwIP TCP/IP Stack. DHCP is used to obtain an Ethernet address. If DHCP times out without obtaining an address, a static IP address will be chosen using AutoIP. The address that is selected will be shown on COM1, allowing access to the internal web pages served by the application via a normal web browser. Figure 2.1 shows the web page that will first be displayed.
In order to demonstrate this application on an Eagle SBC without the optional USB Debug Port you will need the following software and equipment:
Please follow these steps to run the enet_io application on an Eagle SBC without the optional USB Debug Port:
In order to demonstrate the enet_io application on an Eagle SBC with the optional USB Debug Port you will need the following software and equipment:
Please follow these steps to run the enet_io application on an Eagle SBC with the optional USB Debug Port:
The Eagle Code Examples are generated from Stellarisware and may be downloaded from the Software Updates section of the Software Updates section of the Eagle Wiki. After they are downloaded unzip them into a directory of your choice. Descriptions of the examples can be viewed on the Eagle Examples Page.
The Code Examples currently supports the following C and C++ compilers :
The IAR EWARM C/C++ compiler generally produces the smallest code sizes for ARM targets and has excellent integrated debugging capabilities versus the GNU Toolchain. If a GNU chain is used then an IDE needs to be chosen.
An IDE installs when the IAR C/C++ Compiler is installed where the GNU tool chains do not install one. Code::Blocks IDE and the Eclipse IDE are the IDEs currently supported by the Code Examples. Debugging is currently not supported in the Code::Blocks IDE. If a debug environment is needed the Eclipse IDE should be use.
The IAR EWARM Kickstart Edition is a 32 KB code-sized limited version of the IAR C/C++ compiler and debugger. It can be downloaded from IAR's website.
After downloading the EWARM-KS-CD click on the application to install the IAR Embedded Workbench for ARM. Select the ?Install IAR Embedded Workbench? option from the Applications main menu as shown in Figure 2.4. Follow the instructions in the installation application. We suggest that you use the default directories, and the ?Full? installation option.
The Code Examples currently support two GNU tool chains:
Download the Sourcery G++ Lite 2010q1 for ARM EABI version of Sourcery CodeBench Lite Edition for ARM from Mentor Graphics website. When it is finished downloading click on the application to install it and a screen similar to Figure 2.5 should appear. We suggest that you use the default directories during the installation.
If make is not installed on the computer then perform the following steps:
Installing the devkitARM GNU Compiler can be done in 6 steps.
Eclipse is a Java application and has the potential to be run on a wide variety of hardware and operating systems. Eclipse may install on systems with as little as 64MB of memory, however, we recommend to have 1GB of memory or more.
Follow these steps to install the Eclipse IDE:
Codeblocks is a cross-platform IDE built around wxWidgets, designed to be extensible and configurable. It can be downloaded from the Codeblocks website by clicking the following link: http://www.codeblocks.org/downloads
Install Codeblocks by clicking on the downloaded executable.
Follow these steps to compile an example using EWARM.
Follow these steps to compile an example using the Code::Blocks IDE.
Follow these steps to compile an example using the Eclipse IDE.
All example programs include a Makefile that allows you to build binary images from the command line using the GNU toolchain. The GNU ?make? utility is installed as part of the GNU toolchain on the Eagle Setup CD. To build an image using the command line, just change to the project directory and execute ?make?. To build the image for blinky you would perform the following:
There are many options to download firmware to the Eagle SBC. This section covers firmware downloads using a J-Link debugger, USB Debugger, picoJTAG, Ethernet Bootloader, and Serial Bootloader. The method used to download firmware will depend on what hardware is being used.
EWARM can be configured to download firmware using a variety of different debuggers. The following section explains how to set-up EWARM for using the J-Link, optional USB Debugger, and the picoJTAG.
Please see the picoJTAGs Wiki: http://wiki.micromint.com/index.php/PicoJTAG_Manual/Getting_Started#IAR_Plugin
CooCox CoFlash is a stand-alone Cortex M Flash Programming software for PCs running Microsoft Windows. It can be downloaded from the following website: http://www.coocox.org/CoFlash_Programmer.htm
Follow these steps to program a Cortex M microcontroller using CoFlash and the picoJTAG:
The Eagle 50E is shipped with an Ethernet bootloader that can be used to update the firmware on the board from an Ethernet connection. The bootloader uses the BOOTP and TFTP protocols to temporarily acquire an IP address and copy the binary image to the board. The LM Flash Programmer implements a small BOOTP and TFTP server to do this. The LM Flash Programmer can be downloaded from Texas Instruments website. http://www.ti.com/tool/lmflashprogrammer
The bootloader uses the first 8 KB of the flash address space (0x00000000 to 0x00001fff). Programs loaded with the bootloader should be linked to start at address 0x00002000. That is done automatically if you use the ?ewarm/application.icf? or ?gcc/application.ld? linker scripts used in the examples.
You can overwrite the bootloader if you so desire by using the ?ewarm/standalone.icf? or ?gcc/ standalone.ld? linker scripts and downloading your binary image via the JTAG. Currently the bootloader cannot be overwritten via the Ethernet port.
Follow the below steps to use the LM Flash Programmer and the Ethernet bootloader:
Ethernet bootloader troubleshooting guide:
The Eagle 50 is shipped with a Serial bootloader that can be used in conjuction with the LM Flash Programming software to update the firmware on the board from a Serial connection. The LM Flash Programmer can be downloaded from Texas Instruments website http://www.ti.com/tool/lmflashprogrammer.
To place the bootloader in update mode you need to press and hold the user button while the board is starting up, e.g. via power up or when pressing the reset button. After the board starts up release the user button and you will see the user LED blinking approximately once per second. That indicates the board is ready to receive a firmware update via a Serial connection.
Programs loaded with the bootloader should be linked to start at address 0x00002000. That is done automatically if you use the ?ewarm/application.icf? or ?gcc/application.ld? linker scripts used in the examples. You can overwrite the bootloader if you so desire by using the ?ewarm/standalone.icf? or ?gcc/ standalone.ld? linker scripts and downloading your binary image via the JTAG. Currently the bootloader cannot be overwritten via the Serial port.
Follow the below steps to set up the LM Flash Loader:
The application can be downloaded using the LM Flash Programmer and the optional USB Debugger by following these steps:
The application can be downloaded using the LM Flash Programmer and COM1 by following these steps:
The TI Flash Programmer can also be invoked from the command line. The command line allows you to program the Eagle SBC though Ethernet Bootloader, Serial Bootloader, or FTDI JTAG. This section provides a step by step procedure for each programming method. Follow these steps to program the board using the command line and the Ethernet Bootloader. The Eagle 50E and Eagle 100 comes with the Ethernet Bootloader.
lmflash -i ethernet -n 192.168.1.201,192.168.1.210,00-21-A3-00-01-02 blinky.bin
Follow these steps to program the board using the command line and the Serial Bootloader. The Eagle 50 comes with the Ethernet Bootloader.
lmflash -i serial -d -p COM7 -b 115200 -o 0x2000 -r blinky.bin
Follow these steps to program the board using the command line and the USB Debug Port
lmflash ?I ftdi ?r ?o 0x2000 blinky.bin 3. The command line will give you status while the board is programming.
To see all options available from the command line, use ?lmflash ?h?. To see other examples of command lines, use ?lmflash ?examples?.
The following image shows where some of the hardware components are located.
The Eagle 100 includes a Texas Instruments' Stellaris LM3S6918 microcontroller. This 32-bit ARM Cortex-M3 RISC microcontroller is capable of 50-MHz operation with a Thumb2 instruction set for smaller object code. It has hardware division and single cycle multiplication for fast calculations. The nested vector interrupt controller provides interrupt handling for 33 interrupts with eight levels of priority. Please see the Texas Instruments? LM3S6918 Microcontroller Data Sheet for more information and register definitions.
LM3S6918 key features:
A Xilinx?s XC9572XL Complex Programmable Logic Device(CPLD) comes standard on the Eagle 100. The CPLD supports in-system programming via an IEEE 1149.1 boundary-scan JTAG. The XC9572XL is a 3.3V CPLD with 5V tolerant pins. The CPLD has 1,600 usable gates and 72 macrocells. For further information please see Xilinx?s XC9500XL High-Performance CPLD Family Data Sheet.
The Eagle 100 includes a National Semiconductor?s DAC104S085 general purpose digital-to-analog converter (DAC). The DAC has four channels with a resolution of 10-bit. The output amplifiers allow for a rail-to-rail output swing from 0 to 3.3V. Communication to the DAC is done through a three wire synchronous serial interface that operates up to 40 MHz. The DAC?s outputs have a settling time of 6µs. It allows for simultaneous output updating. For further information please see National Semiconductor?s DAC104S085 Data Sheet.
NEXT: User Interfaces, Connectors, and Jumpers
The following image shows where the connectors, headers, and jumpers are located on the Eagle 100.
The Eagle 100 requires a regulated +5VDC at 250mA power supply applied to J1. J1 comes standard with a 2.5 mm positive center tapped female power supply jack. It can be populated with a 2 position screw terminal upon request. A diode (D1) will protect the Eagle 100 should polarity of the power supply be reversed. When power is applied LED1 will illuminate.
WARNING: Supply voltages over +5VDC while a LCD is connected may damage the LCD.
The LM3S6918 is equipped with a fully-integrated 10/100 Mbps Ethernet Controller. Both the Ethernet Media Access Control (MAC) and Physical (PHY) layers are integrated in the microcontroller. The RJ-45 connector with integrated magnetics and built in LEDs completes the Ethernet sub-system. Please see the LM3S6918 data sheet for further information on the Ethernet controller.
Both Universal Asynchronous Receivers/Transmitters (UARTs) are level shifted to RS-232 levels. UART0 (COM1) reaches the external world through a male DB9 connector. UART1 (COM2) reaches the external world through a 2x5 pin berg header. Please see figure 4.3 for the pin outs of COM1 (J3) and COM2 (J4) connectors. The two serial ports support software handshaking (XON/XOFF). To simplify interfacing to devices using hardware handshaking, a loopback is implemented on the modem control signals, from RTS to CTS and from DTR to CD and DSR. Note that the loopbacks do not provide flow control so software handshaking should be used when proper flow control is desired.
The microSD socket (J9) enables micro-secure-digital memory cards to be plugged into the Eagle 100 microcontroller board. The microSD card allows the user the ability of a standard removable media for transferring data to and from the Eagle 100.
The general purpose digital inputs/outputs (I/O) are broken into two different categories GPIO (General Purpose Input/Outputs) and Extended I/O. The GPIO is accessed directly through the LM3S6918 microcontroller and the Extended I/O is accessed through the CPLD (Complex Programmable Logic Device) via the microcontrollers Synchronous Serial Interface (SSI) port zero.
There are twenty bits of GPIO available on the J2 connector. Please see the pin out for J2 in Figure 4.5. Eight bits are from port B, eight are from port C and four are from port E. NOTE: If the keypad port (J11) is used then port B on the J2 connector should not be used (pins 3 through 10 of J2). Ports B, C, and E have alternate functions other than digital inputs and outputs. Table 4.5 lists the alternate functions and a brief description of the function. For further information on the alternate functions please refer to the LM3S6918 data sheet.
The J2 connector also has the input and output for the hibernation module. Pin 29 is the WAKE input that brings the microcontroller out of hibernation mode when it is asserted. Pin 30 is the HIB output that indicates the microcontroller is in hibernation mode. The power source (VBAT) for the hibernation module can be accessed from Pin 28 of J2.
The extended I/O is accessed through the CPLD. There are four eight bit ports PXA, PXB, PXC, and PXD. The pin out for the extended I/O connector (J12) can be viewed in Figure 4.5. The numbers in parenthesis are the pin numbers for the CPLD. The provided VHDL firmware can be changed to use the extended I/O ports for application specific purposes. NOTE: If the LCD connector (J10) is used then PXD of the extended I/O is no longer available and nothing should be connected to pins 33 through 40 of J12.
| J2 Pin# | GPIO | Alternate Function | Brief Description |
|---|---|---|---|
| 3 | PB0 | CCP0 | Capture/Compare/Pulse Width Modulation Channel 0 |
| 4 | PB1 | CCP2 | Capture/Compare/Pulse Width Modulation Channel 2 |
| 5 | PB2 | I2C 0SCL | Inter-Integrated Circuit Interface bus 0 clock |
| 6 | PB3 | I2C 0SDA | Inter-Integrated Circuit Interface bus 0 clock |
| 7 | PB4 | C0- | Analog comparator channel 0 negative input |
| 8 | PB5 | C1- | Analog comparator channel 1 negative input |
| 9 | PB6 | C0+ | Analog comparator channel 0 positive input |
| 10 | PB7 | TRST | JTAG Test Reset |
| 13 | PC0 | TCK/SWCLK | JTAG Test Clock/Serial Wire Debug clock |
| 14 | PC1 | TMS/SWDIO | JTAG Test Mode Select/Serial Wire Debug Input and Output |
| 15 | PC2 | TDI | JTAG Test Data Input |
| 16 | PC3 | TDO/SWO | JTAG Test Data Output and SWO |
| 17 | PC4 | CCP5 | Capture/Compare/Pulse Width Modulation Channel 5 |
| 18 | PC5 | C1+/C0o | Analog comparator channel 1 positive input/Analog comparator channel 0 output |
| 19 | PC6 | CCP3 | Capture/Compare/Pulse Width Modulation Channel 3 |
| 20 | PC7 | CCP4 | Capture/Compare/Pulse Width Modulation 4 |
| 23 | PE0 | SSI1Clk | Synchronous Serial Interface bus 1 clock |
| 24 | PE1 | SSI1Fss | Synchronous Serial Interface bus 1 function slave select |
| 25 | PE2 | SSI1Rx | Synchronous Serial Interface bus 1 receiver |
| 26 | PE3 | SSI1Tx | Synchronous Serial Interface bus 1 transmitter |
A 4x4 matrix keypad using a 16-pin (2x8) ribbon cable can be connected to port B of the microcontroller through J11. Please see Figure 4.6 for the pin out of the keypad connector. NOTE: If the keypad port (J11) is used then port B on the J2 connector should not be used (pins 3 through 10 of J2).
A standard alphanumeric LCD may be connected to J10 through a 32-pin (2x16) ribbon cable. Extended port D is the byte-wide port used for the LCD?s data bus. The LCD?s control signals and backlight are driven by the CPLD as well. The contrast for the LCD may be adjusted by turning potentiometer R33 located next to J10. Please see figure 4.7 for the LCD?s connector pin out. NOTE: If the LCD connector (J10) is used then PXD of the extended I/O is no longer available and nothing should be connected to pins 33 through 40 of J12.
The JTAG port can be used for software download and debugging, reducing the need for an in-circuit emulator. For detailed information on the operation of the JTAG port and TAP controller, please refer to IEEE Standard 1149.1-Test Access Port and Boundary-Scan Architecture. JTAG connector
The Eagle 100?s eight channels of 10-bit ADC can be connected to through J7. Please see figure 4.9 for the pin out of the ADC connector. The ADC is accessed directly through the LM3S6918 microcontroller. It is capable of 500 kilo-samples/second and can be configured as eight single ended or four differential channels. The ADC can be triggered to read through software, timers, analog comparators, or GPIO. An internal temperature sensor may be read using the ADC module. Please see the LM3S6918 datasheet for further details. ADC connector
The Eagle 100?s four channels of 10-bit DAC can be connected to through J8. Please refer to figure 4.10 for the pin out of the DAC connector. The DAC is accessed through the LM3S6918?s SSI0 port. Port G bit 0 is the DAC?s sync input for loading the conversion count into the DAC. The DAC can be updated at a maximum of 150 kHz for 1 channel. The data transfer is 16-bits at 25 MHz which is a total of 640 nS per data transfer but the DAC has a settling time of 6 µS so the total time needed is 6.64 µS. All 4 channels of the DAC can be updated at a maximum of 116 kHz. This is accomplished by sending the data for all 4 channels and updating all of the outputs on the last data transfer.
The Eagle 100 comes standard with a user pushbutton, a reset push button, a user LED and a power LED. The user push button is connected to port A bit 6 with a 10k? pull-up resistor connected to it. The user LED is buffered through the CPLD and can be illuminated by setting port E bit 1 of the LM3S6918.
The CPLD comes preprogrammed from the factory with VHDL code that will function with the example programs and certified PC/104 expansion boards. The VHDL firmware can be updated in two ways. The first way is directly through the CPLD?s JTAG port which can be accessed through the combination of JP1 and JP2 as illustrated in Figure 4.12. The second method is by programming the LM3S6918 microcontroller with a utility that will program the CPLD through its SPI0 port. This can be done by placing jumper across pins 1&2, 3&4, 5&6, and 7&8 of JP1 as like in Figure 4.12.
The available signals on the PC/104 expansion connector are shown in Figure 4-13. The default VHDL firmware shipped with the Eagle SBC allows access to those signals as extended I/O ports. VHDL firmware is available on the Micromint web site that allows use of certified PC/104 expansion boards with the Eagle SBC. Using the signals for extended I/O will lead to higher I/O performance but the PC/104 mode allows use of off-the-shelf expansion boards. PC/104 connector
PREVIOUS: Mechanical and Electrical Characteristics
| Operating Temperature | Maximum Voltage | ||
| Commercial | 0ºC to +70ºC | Voltage on J1 with LCD | +5.5 VDC Regulated |
| Industrial | -40°C to +85°C | Voltage on J1 without LCD | +15 VDC Regulated |
| Storage Temperature | -50ºC to +125ºC | Voltage on VBAT (JP7&J2) | +3.3 VDC Regulated |
The Eagle SBC is currently available for commercial temperature ranges. Contact the Micromint sales department if you require support for industrial temperature ranges.
| DIM | Inches | Millimeters | DIM | Inches | Millimeters | DIM | Inches | Millimeters |
|---|---|---|---|---|---|---|---|---|
| A | 4.4 | 111.76 | I | 1.15 | 29.21 | Q | 4.15 | 105.41 |
| B | 0.35 | 8.89 | J | 0.56 | 14.224 | R | 0.125 | 3.175 |
| C | 0.375 | 9.525 | K | 2.8 | 71.12 | S | 0.2 | 5.08 |
| D | 0.75 | 19.05 | L | 0.75 | 19.05 | T | 0.4 | 10.16 |
| E | 1.775 | 45.085 | M | 3.8 | 96.52 | U | 0.775 | 19.685 |
| F | 1.15 | 29.21 | N | 0.65 | 16.51 | V | 0.55 | 13.97 |
| G | 0.5 | 12.7 | O | 1.05 | 26.67 | W | 0.2 | 5.08 |
| H | 0.53 | 13.462 | P | 3.15 | 80.01 |
PREVIOUS: User Interfaces, Connectors, and Jumpers
This section outlines material that may be useful for further reading.
LM3S6918 Microcontroller Data Sheet
http://www.ti.com/product/lm3s6918
This data sheet provides reference information for the LM3S6918 microcontroller, describing the functional blocks of the system-on-chip (SoC) device designed around the ARM® Cortex?-M3 core. All MCU registers are described in the data sheet.
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The Definitive Guide to ARM® Cortex-M3 and Cortex-M4 Processors, Third Edition by Joseph Yiu ISBN: 0124080820 Publisher: Newnes (November, 2013) Overview of the processor and instruction set architecture of the ARM® Cortex®-M3 and Cortex®-M4 processors. Several code examples using IAR, Keil, gcc and CooCox CoIDE. |
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The Designer's Guide to the Cortex-M Processor Family: A Tutorial Approach by Trevor Martin ISBN: 0080982964 Publisher: Newnes (May, 2009) Tutorial-based book giving the key concepts required to develop programs in C with a Cortex M- based processor. |
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ARM System Developer's Guide: Designing and Optimizing System Software ISBN: 1558608745 Publisher: Morgan Kaufmann; (March, 2004) In-depth overview of the ARM architecture with examples that outline impact of programming practices on performance, power and cost. |
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by Volnei A. Pedroni ISBN: 0262162245 Publisher: MIT Press (August, 2004) Concise overview of the VHDL language and design concepts. Includes a large number of complete design examples with illustrative circuit diagrams and simulation results. |
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The Designers Guide to VHDL, Volume 3, Third Edition by Peter J. Ashenden ISBN: 0120887851 Publisher: Morgan Kaufmann (May, 2008) Starts with the basics of VHDL and builds on to create registers and other logic subsystems. Continues with more complex projects such as a the DLX processor, a basic CPU implemented with VHDL. |
Micromint Web Site
Product information and software updates for the Eagle SBCs.
Texas Instruments Web Site
Manuals and application notes for the LM3S6918 microcontroller.
