Using CPLD/3
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Firmware Updates
Modifying and Rebuilding
To modify and rebuild the reference applications, the Xilinx ISE 10.1 tools should be used. Three projects are included with the source code for each of the reference implementations: monitor.ise, xtender.ise and pc104.ise. The project allows you to build the module after your changes to create a programming file in JED format.
Xilinx JTAG
The Eagle 100 includes a 6x1 JTAG header for CPLD programming combining JP1 and JP2 that is compatible with Xilinx tools. The proper connector orientation will have VDD and ground on JP2 pins 2 and 1 respectively. Other compatible JTAGs can be used, such as the Digilent JTAG-USB Cable with its ExPort tool. Note that some CPLD programming tools requires a file in the SVF format. You can use the Xilinx iMPACT utility to convert the JED programming file to SVF.
microSD Card
To allow customers to update their CPLD firmware without a Xilinx JTAG, Micromint includes a cpld_update application that allows updates to the programmable logic using the microSD card. Follow the procedure listed below to use this application.
- Copy the updated firmware in XSVF format to the microSD card and insert it on the Eagle 100 SBC.
- Insert four jumpers on JP1 to connect the ARM SSI port to the CPLD JTAG port.
- Connect a serial terminal or terminal emulator to port COM1 of the Eagle 100.
- Load the cpld_update.bin firmware on the board using a JTAG or the Luminary Flash Programmer. Make sure you have a file with the current firmware in use to restore it afterwards.
- Reset the board and use the “updatepl” command to update the CPLD as per the example in Figure 3-1.
- Remove the jumpers on JP1, restore the previous firmware in use and reset the board.
The source code of the cld_update utility is included in the DriverLib directory to allow customization for special requirements.
Figure 3-1: Command line for cpld_update