Bambino-210 Manual/Hardware - Revision history

Support at 14:00, 1 June 2015

2015-06-01T14:00:47Z

← Older revision		Revision as of 14:00, 1 June 2015
Line 1:		Line 1:
-	[[Category: Bambino-210_Manual\|04]]	+	[[Category: Bambino-210_Manual\|4]]
	The following image shows where some of the hardware components are located.		The following image shows where some of the hardware components are located.

2014-03-11T13:14:23Z

← Older revision		Revision as of 13:14, 11 March 2014
Line 93:		Line 93:
	The Bambino 210E includes a Micrel KSZ8081 10 Base-T/100 Base-TX Physical Layer Transceiver (PHY). The PHY has a RMII interface to transmit and receive data to the LPC4330's Media Access Controller. It has auto-negotiation to automatically select the highest link-up speed (10/100 Mbps) and duplex (half/full). For further information please see KSZ8081 Data Sheet.		The Bambino 210E includes a Micrel KSZ8081 10 Base-T/100 Base-TX Physical Layer Transceiver (PHY). The PHY has a RMII interface to transmit and receive data to the LPC4330's Media Access Controller. It has auto-negotiation to automatically select the highest link-up speed (10/100 Mbps) and duplex (half/full). For further information please see KSZ8081 Data Sheet.

		+	==MBED HDK==
		+	The MBED HDK is powered by NXP's LPC11U35. The mbed HDK uses the CMSIS-DAP Interface design that provides simple USB drag-n-drop programming and CMSIS-DAP debug interface for the target microcontroller.

	----		----

2014-03-11T13:04:07Z

USB Power Mux

← Older revision		Revision as of 13:04, 11 March 2014
Line 88:		Line 88:

	==USB Power Mux==		==USB Power Mux==
-	Texas Instruments TPS2115 auto-switching power mux is used to select b	+	Texas Instruments TPS2115 auto-switching power mux is used to select between USB0 and USB1. It provides a seamless transition between USB1 (MBED HDK) and USB0 on the Bambino 210. The TPS2115 includes thermal protection and reverse-conduction blocking.

	==Ethernet PHY (Bambino 210E)==		==Ethernet PHY (Bambino 210E)==

2014-03-11T13:00:38Z

Ethernet PHY (Bambino 210E)

← Older revision		Revision as of 13:00, 11 March 2014
Line 91:		Line 91:

	==Ethernet PHY (Bambino 210E)==		==Ethernet PHY (Bambino 210E)==
-	The Bambino 210E includes a Micrel ~~KSZ8031~~ 10 Base-T/100 Base-TX Physical Layer Transceiver (PHY). The PHY has a RMII interface to transmit and receive data to the LPC4330's Media Access Controller. It has auto-negotiation to automatically select the highest link-up speed (10/100 Mbps) and duplex (half/full). For further information please see ~~KSZ8031~~ Data Sheet.	+	The Bambino 210E includes a Micrel KSZ8081 10 Base-T/100 Base-TX Physical Layer Transceiver (PHY). The PHY has a RMII interface to transmit and receive data to the LPC4330's Media Access Controller. It has auto-negotiation to automatically select the highest link-up speed (10/100 Mbps) and duplex (half/full). For further information please see KSZ8081 Data Sheet.

2014-03-11T12:58:57Z

USB Power Mux

← Older revision		Revision as of 12:58, 11 March 2014
Line 88:		Line 88:

	==USB Power Mux==		==USB Power Mux==
		+	Texas Instruments TPS2115 auto-switching power mux is used to select b

	==Ethernet PHY (Bambino 210E)==		==Ethernet PHY (Bambino 210E)==

2014-03-10T20:20:39Z

← Older revision		Revision as of 20:20, 10 March 2014
Line 3:		Line 3:

	[[Image:Bambino-210-Hardware.png\|center\|alt=Bambino 210 Hardware Diagram\|frame\|<div align="center">'''Bambino 210 Hardware]]		[[Image:Bambino-210-Hardware.png\|center\|alt=Bambino 210 Hardware Diagram\|frame\|<div align="center">'''Bambino 210 Hardware]]
-		+	</div>
	==Microcontroller==		==Microcontroller==
	The Bambino 210 includes a NXP LPC4330 microcontroller. These dual core 32-bit ARM Cortex-M4/M0 RISC microcontroller are capable of 204-MHz operation with a Thumb2 instruction set for smaller object code. It uses a Harvard architecture with separate local instruction and data buses as well as a separate peripherals bus. Please see NXP’s LPC4330 Microcontroller's User Manual for more information and register definitions.		The Bambino 210 includes a NXP LPC4330 microcontroller. These dual core 32-bit ARM Cortex-M4/M0 RISC microcontroller are capable of 204-MHz operation with a Thumb2 instruction set for smaller object code. It uses a Harvard architecture with separate local instruction and data buses as well as a separate peripherals bus. Please see NXP’s LPC4330 Microcontroller's User Manual for more information and register definitions.

2014-02-06T21:54:08Z

← Older revision		Revision as of 21:54, 6 February 2014
Line 1:		Line 1:
	[[Category: Bambino-210_Manual\|04]]		[[Category: Bambino-210_Manual\|04]]
	The following image shows where some of the hardware components are located.		The following image shows where some of the hardware components are located.
		+
		+	[[Image:Bambino-210-Hardware.png\|center\|alt=Bambino 210 Hardware Diagram\|frame\|<div align="center">'''Bambino 210 Hardware]]

	==Microcontroller==		==Microcontroller==

2014-02-04T21:54:34Z

← Older revision		Revision as of 21:54, 4 February 2014
Line 84:		Line 84:
	==Serial Flash Memory==		==Serial Flash Memory==
	The Bambino 210 uses Quad SPI Flash for it's program and non-volatile data storage. The quad SPI flash has a maximum clock rate of 80 MHz. The Bambino 210 uses a 4M flash and the Bambino 210E uses an 8M flash. Both memories have 4KB sectors.		The Bambino 210 uses Quad SPI Flash for it's program and non-volatile data storage. The quad SPI flash has a maximum clock rate of 80 MHz. The Bambino 210 uses a 4M flash and the Bambino 210E uses an 8M flash. Both memories have 4KB sectors.
		+
		+	==USB Power Mux==

	==Ethernet PHY (Bambino 210E)==		==Ethernet PHY (Bambino 210E)==

2014-02-01T18:48:38Z

Ethernet PHY (Bambino 210E)

← Older revision		Revision as of 18:48, 1 February 2014
Line 93:		Line 93:
	[[Bambino-210_Manual/User Interfaces, Connectors, and Jumpers\|NEXT: User Interfaces, Connectors, and Jumpers]]		[[Bambino-210_Manual/User Interfaces, Connectors, and Jumpers\|NEXT: User Interfaces, Connectors, and Jumpers]]

-	[[Bambino-210_Manual/Rebuild ~~mbed~~ Firmware\|PREVIOUS: Rebuild ~~mbed~~ Firmware]]	+	[[Bambino-210_Manual/Rebuild Firmware\|PREVIOUS: Rebuild Firmware]]

2014-02-01T18:45:16Z

← Older revision		Revision as of 18:45, 1 February 2014
Line 85:		Line 85:
	The Bambino 210 uses Quad SPI Flash for it's program and non-volatile data storage. The quad SPI flash has a maximum clock rate of 80 MHz. The Bambino 210 uses a 4M flash and the Bambino 210E uses an 8M flash. Both memories have 4KB sectors.		The Bambino 210 uses Quad SPI Flash for it's program and non-volatile data storage. The quad SPI flash has a maximum clock rate of 80 MHz. The Bambino 210 uses a 4M flash and the Bambino 210E uses an 8M flash. Both memories have 4KB sectors.

-	==PHY (Bambino 210E)==	+	==Ethernet PHY (Bambino 210E)==
	The Bambino 210E includes a Micrel KSZ8031 10 Base-T/100 Base-TX Physical Layer Transceiver (PHY). The PHY has a RMII interface to transmit and receive data to the LPC4330's Media Access Controller. It has auto-negotiation to automatically select the highest link-up speed (10/100 Mbps) and duplex (half/full). For further information please see KSZ8031 Data Sheet.		The Bambino 210E includes a Micrel KSZ8031 10 Base-T/100 Base-TX Physical Layer Transceiver (PHY). The PHY has a RMII interface to transmit and receive data to the LPC4330's Media Access Controller. It has auto-negotiation to automatically select the highest link-up speed (10/100 Mbps) and duplex (half/full). For further information please see KSZ8031 Data Sheet.