View source

[[Category: Eagle-100_Manual|4]]

The following image shows where the connectors, headers, and jumpers are located on the Eagle 100.
 
==Power Supply==

The Eagle 100 requires a regulated +5VDC at 250mA power supply applied to J1. J1 comes standard with a 2.5 mm positive center tapped female power supply jack. It can be populated with a 2 position screw terminal upon request. A diode (D1) will protect the Eagle 100 should polarity of the power supply be reversed. When power is applied LED1 will illuminate.                                    

[[Image:warning.gif|alt=Warning|]]WARNING: Supply voltages over +5VDC while a LCD is connected may damage the LCD.

[[Image:Eagle-100-Power.gif|center|alt=Eagle-100-Power|frame|<div align="center">'''Figure 4.1: Power supply connector configurations]]   </div>

==10/100 Ethernet==
The LM3S6918 is equipped with a fully-integrated 10/100 Mbps Ethernet Controller. Both the Ethernet Media Access Control (MAC) and Physical (PHY) layers are integrated in the microcontroller. The RJ-45 connector with integrated magnetics and built in LEDs completes the Ethernet sub-system.  Please see the LM3S6918 data sheet for further information on the Ethernet controller.

==Serial (COM) Ports==
Both Universal Asynchronous Receivers/Transmitters (UARTs) are level shifted to RS-232 levels. UART0 (COM1) reaches the external world through a male DB9 connector. UART1 (COM2) reaches the external world through a 2x5 pin berg header.  Please see figure 4.3 for the pin outs of COM1 (J3) and COM2 (J4) connectors. The two serial ports support software handshaking (XON/XOFF). To simplify interfacing to devices using hardware handshaking, a loopback is implemented on the modem control signals, from RTS to CTS and from DTR to CD and DSR. Note that the loopbacks do not provide flow control so software handshaking should be used when proper flow control is desired.
  
[[Image:Eagle-100-Com.gif|center|alt=Eagle-100-Com|frame|<div align="center">'''Figure 4.3: COM port connector pin outs]] </div>

==Micro-SD==
The microSD socket (J9) enables micro-secure-digital memory cards to be plugged into the Eagle 100 microcontroller board. The microSD card allows the user the ability of a standard removable media for transferring data to and from the Eagle 100.

==General Purpose Digital Inputs and Outputs==
The general purpose digital inputs/outputs (I/O) are broken into two different categories GPIO (General Purpose Input/Outputs) and Extended I/O. The GPIO is accessed directly through the LM3S6918 microcontroller and the Extended I/O is accessed through the CPLD (Complex Programmable Logic Device) via the microcontrollers Synchronous Serial Interface (SSI) port zero.

There are twenty bits of GPIO available on the J2 connector. Please see the pin out for J2 in Figure 4.5. Eight bits are from port B, eight are from port C and four are from port E. NOTE: If the keypad port (J11) is used then port B on the J2 connector should not be used (pins 3 through 10 of J2). Ports B, C, and E have alternate functions other than digital inputs and outputs. Table 4.5 lists the alternate functions and a brief description of the function. For further information on the alternate functions please refer to the LM3S6918 data sheet.  

The J2 connector also has the input and output for the hibernation module. Pin 29 is the WAKE input that brings the microcontroller out of hibernation mode when it is asserted. Pin 30 is the HIB output that indicates the microcontroller is in hibernation mode. The power source (VBAT) for the hibernation module can be accessed from Pin 28 of J2.

The extended I/O is accessed through the CPLD. There are four eight bit ports PXA, PXB, PXC, and PXD. The pin out for the extended I/O connector (J12) can be viewed in Figure 4.5. The numbers in parenthesis are the pin numbers for the CPLD. The provided VHDL firmware can be changed to use the extended I/O ports for application specific purposes.  NOTE: If the LCD connector (J10) is used then PXD of the extended I/O is no longer available and nothing should be connected to pins 33 through 40 of J12.

{| border="1" cellpadding="5" cellspacing="2" align="center" style="text-align: center;"
|+ align="bottom"|'''Table 4.5:''' GPIO alternate functions
!'''J2 Pin#'''
!'''GPIO'''
!'''Alternate Function'''
!'''Brief Description'''
|-
|3
|PB0
|CCP0
|Capture/Compare/Pulse Width Modulation Channel 0
|-
|4
|PB1
|CCP2
|Capture/Compare/Pulse Width Modulation Channel 2
|-
|5
|PB2
|I2C 0SCL
|Inter-Integrated Circuit Interface bus 0 clock
|-
|6
|PB3
|I2C 0SDA
|Inter-Integrated Circuit Interface bus 0 clock
|-
|7
|PB4
|C0-
|Analog comparator channel 0 negative input
|-
|8
|PB5
|C1-
|Analog comparator channel 1 negative input
|-
|9
|PB6
|C0+
|Analog comparator channel 0 positive input
|-
|10
|PB7
|TRST
|JTAG Test Reset
|-
|13
|PC0
|TCK/SWCLK
|JTAG Test Clock/Serial Wire Debug clock
|-
|14
|PC1
|TMS/SWDIO
|JTAG Test Mode Select/Serial Wire Debug Input and Output
|-
|15
|PC2
|TDI
|JTAG Test Data Input
|-
|16
|PC3
|TDO/SWO
|JTAG Test Data Output and SWO
|-
|17
|PC4
|CCP5
|Capture/Compare/Pulse Width Modulation Channel 5
|-
|18
|PC5
|C1+/C0o
|Analog comparator channel 1 positive input/Analog comparator channel 0 output
|-
|19
|PC6
|CCP3
|Capture/Compare/Pulse Width Modulation Channel 3
|-
|20
|PC7
|CCP4
|Capture/Compare/Pulse Width Modulation 4
|-
|23
|PE0
|SSI1Clk
|Synchronous Serial Interface bus 1 clock
|-
|24
|PE1
|SSI1Fss
|Synchronous Serial Interface bus 1 function slave select
|-
|25
|PE2
|SSI1Rx
|Synchronous Serial Interface bus 1 receiver
|-
|26
|PE3
|SSI1Tx
|Synchronous Serial Interface bus 1 transmitter
|}

[[Image:Eagle-100-GPIO.gif|center|alt=Eagle-100-GPIO|frame|<div align="center">'''Figure 4.5: Extended I/O and GPIO connector pin out (CPLD pin#)]]  </div>

==Keypad==
A 4x4 matrix keypad using a 16-pin (2x8) ribbon cable can be connected to port B of the microcontroller through J11.  Please see Figure 4.6 for the pin out of the keypad connector. NOTE: If the keypad port (J11) is used then port B on the J2 connector should not be used (pins 3 through 10 of J2).

[[Image:Eagle-100-Kpad.gif|center|alt=Eagle-100-Kpad|frame|<div align="center">'''Figure 4.6: Keypad connector pin out]]  </div>

==Liquid Crystal Display (LCD)==
A standard alphanumeric LCD may be connected to J10 through a 32-pin (2x16) ribbon cable. Extended port D is the byte-wide port used for the LCD’s data bus. The LCD’s control signals and backlight are driven by the CPLD as well. The contrast for the LCD may be adjusted by turning potentiometer R33 located next to J10. Please see figure 4.7 for the LCD’s connector pin out. NOTE: If the LCD connector (J10) is used then PXD of the extended I/O is no longer available and nothing should be connected to pins 33 through 40 of J12.
 
[[Image:Eagle-100-LCD.gif|center|alt=Eagle-100-LCD|frame|<div align="center">'''Figure 4.7: LCD connector pin out (CPLD pin#)]]  </div>

==JTAG==
The JTAG port can be used for software download and debugging, reducing the need for an in-circuit emulator. For detailed information on the operation of the JTAG port and TAP controller, please refer to IEEE Standard 1149.1-Test Access Port and Boundary-Scan Architecture.
JTAG connector

[[Image:Eagle-100-JTAG.gif|center|alt=Eagle-100-JTAG|frame|<div align="center">'''Figure 4.8: JTAG connector pin out]]  </div>

==Analog to Digital Converter (ADC)==
The Eagle 100’s eight channels of 10-bit ADC can be connected to through J7. Please see figure 4.9 for the pin out of the ADC connector. The ADC is accessed directly through the LM3S6918 microcontroller. It is capable of 500 kilo-samples/second and can be configured as eight single ended or four differential channels. The ADC can be triggered to read through software, timers, analog comparators, or GPIO. An internal temperature sensor may be read using the ADC module. Please see the LM3S6918 datasheet for further details.
ADC connector

[[Image:Eagle-100-ADC.gif|center|alt=Eagle-100-ADC|frame|<div align="center">'''Figure 4.9: Analog to Digital connector pin out]]  </div>

==Digital to Analog Converter (DAC)==
The Eagle 100’s four channels of 10-bit DAC can be connected to through J8. Please refer to figure 4.10 for the pin out of the DAC connector. The DAC is accessed through the LM3S6918’s SSI0 port. Port G bit 0 is the DAC’s sync input for loading the conversion count into the DAC. The DAC can be updated at a maximum of 150 kHz for 1 channel. The data transfer is 16-bits at 25 MHz which is a total of 640 nS per data transfer but the DAC has a settling time of 6 µS so the total time needed is 6.64 µS. All 4 channels of the DAC can be updated at a maximum of 116 kHz. This is accomplished by sending the data for all 4 channels and updating all of the outputs on the last data transfer.

[[Image:Eagle-100-DAC.gif|center|alt=Eagle-100-DAC|frame|<div align="center">'''Figure 4.10: Digital to Analog connector pin out]]  </div>

==Pushbuttons and LED==
The Eagle 100 comes standard with a user pushbutton, a reset push button, a user LED and a power LED. The user push button is connected to port A bit 6 with a 10kΩ pull-up resistor connected to it. The user LED is buffered through the CPLD and can be illuminated by setting port E bit 1 of the LM3S6918.  

==CPLD Programming Header==
The CPLD comes preprogrammed from the factory with VHDL code that will function with the example programs and certified PC/104 expansion boards. The VHDL firmware can be updated in two ways. The first way is directly through the CPLD’s JTAG port which can be accessed through the combination of JP1 and JP2 as illustrated in Figure 4.12. The second method is by programming the LM3S6918 microcontroller with a utility that will program the CPLD through its SPI0 port. This can be done by placing jumper across pins 1&2, 3&4, 5&6, and 7&8 of JP1 as like in Figure 4.12.  
 
[[Image:Eagle-100-CPLD.gif|center|alt=Eagle-100-CPLD|frame|<div align="center">'''Figure 4.12: CPLD programming jumper pin out (CPLD pin#)]]  </div>

==PC/104 Expansion==
The available signals on the PC/104 expansion connector are shown in Figure 4-13. The default VHDL firmware shipped with the Eagle SBC allows access to those signals as extended I/O ports. VHDL firmware is available on the Micromint web site that allows use of certified PC/104 expansion boards with the Eagle SBC. Using the signals for extended I/O will lead to higher I/O performance but the PC/104 mode allows use of off-the-shelf expansion boards.
PC/104 connector

[[Image:Eagle-100-PC104.gif|center|alt=Eagle-100-PC104|frame|<div align="center">'''Figure 4.13: PC/104 connector pin out (CPLD pin#)]]  </div>
----
[[Eagle-100_Manual/References|NEXT: References]]

[[Eagle-100_Manual/Mechanical and Electrical Characteristics|PREVIOUS: Mechanical and Electrical Characteristics]]